- an Information Portal by Dr. Debashish Mohapatra
Title Published Date
Full adder in Structural modelling using two Half adders and an Or gate as components Tue, 05 Jul 2011
Gray to Bnary Converter Tue, 05 Jul 2011
PRBS( Pseudo Random Binary Sequence Generator) VHDL Code and VHDL Testbench Creation Thu, 08 Nov 2012
Structural Modelling of a 4:1 mux using Three 2:1 mux As components Tue, 05 Jul 2011

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