4:1 mux Behavioural modelling using CASE statement

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY mux4x1_case IS
    PORT (
        a, b, c, d : IN STD_LOGIC;
        s : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
        y : OUT STD_LOGIC);
END mux4x1_case;

ARCHITECTURE mux_case OF mux4x1_case IS

BEGIN
    PROCESS (s, a, b, c, d)
    BEGIN
        CASE s IS
            WHEN "00" => y <= a;
            WHEN "01" => y <= b;
            WHEN "10" => y <= c;
            WHEN OTHERS => y <= d;
        END CASE;
    END PROCESS;
END mux_case;